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specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 22509 ms 20090212-s00006 / n2206 / 73004tn(ot) no.7946-1/14 lb11946 overview the lb11946 is a stepping motor driver ic that implements pwm current control bipolar drive with a fixed off time. this ic features 15 current setting levels using a fixed vref vo ltage and support for micro-stepping drive from 1-2 phase excitation drive to 4w1-2 phase excitation drive. this device is optimal for driving stepping motors such as those used for carriage drive and paper feed in printers. features ? pwm current control (with a fixed off time) ? logic input serial-parallel converter (allows 1-2, w1-2, 2w1-2, and 4w1-2 phase excitation drive) ? current attenuation switching function (with sl ow decay, fast decay, and mixed decay modes) ? built-in upper and lower side diodes ? simultaneous on state prevention function (through current prevention) ? noise canceller function ? thermal shutdown circuit ? shutoff on low logic system voltage circuit ? low-power mode control pin specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit motor supply voltage v bb 50 v peak output current i o peak tw 20 s 1.2 a continuous output current i o max 1.0 a logic system supply voltage v cc 7.0 v logic input voltage range v in -0.3 to v cc v v cc = 5v specifications 1.0 v emitter output voltage ve v cc = 3.3v specifications 0.5 v allowable power dissipation pd max independent ic 3.0 w operating temperature topr -25 to + 85 c storage temperature tstg -55 to + 150 c monolithic digital ic pwm current control stepping motor driver orderin g numbe r : en7946a
lb11946 no.7946-2/14 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit motor supply voltage v bb 10 to 45 v v cc = 5v specifications 4.5 to 5.5 v logic system supply voltage v cc v cc = 3.3v specifications 3.0 to 3.6 v v cc = 5v specifications 0.0 to 3.0 v reference voltage vref v cc = 3.3v specifications 0.0 to 1.0 v electrical characteristics at ta = 25 c, v cc = 5v, v bb = 42v, vref = 1.52v ratings parameter symbol conditions min typ max unit output block i bb on 0.9 1.3 1.7 ma output stage supply current i bb off 0.52 0.7 1.05 ma v o (sat) 1 i o = + 0.5a (sink) 1.1 1.4 v v o (sat) 2 i o = + 1.0a (sink) 1.4 1.7 v v o (sat) 3 i o = -0.5a (source) 1.9 2.2 v output saturation voltage v o (sat) 4 i o = -1.0a (source) 2.2 2.5 v i o 1 (leak) v o = v bb (sink) 50 a output leakage current i o 2 (leak) v o = 0v (source) -50 a output sustain voltage v sus l = 15mh, i o = 1.0a, design guarantee * 45 v logic block i cc on d0 = 1, d1 = 1, d2 = 1, d3 = 1 when these data values are set 24 35 46 ma i cc off1 d0 = 0, d1 = 0, d2 = 0, d3 = 0 22 32 42 ma logic system supply current i cc off2 st = low 0.05 0.1 ma v ih 2 v input voltage v il 0.8 v i ih v ih = 2 v 35 a input current i il v il = 0.8 v 6 a d0 = 1, d1 = 1, d2 = 1, d3 = 1 when these data values are set 0.470 0.50 0.525 v d0 = 1, d1 = 1, d2 = 1, d3 = 0 0.445 0.48 0.505 v d0 = 1, d1 = 1, d2 = 0, d3 = 1 0.425 0.46 0.485 v d0 = 1, d1 = 1, d2 = 0, d3 = 0 0.410 0.43 0.465 v d0 = 1, d1 = 0, d2 = 1, d3 = 1 0.385 0.41 0.435 v d0 = 1, d1 = 0, d2 = 1, d3 = 0 0.365 0.39 0.415 v d0 = 1, d1 = 0, d2 = 0, d3 = 1 0.345 0.37 0.385 v d0 = 1, d1 = 0, d2 = 0, d3 = 0 0.325 0.35 0.365 v d0 = 0, d1 = 1, d2 = 1, d3 = 1 0.280 0.30 0.325 v d0 = 0, d1 = 1, d2 = 1, d3 = 0 0.240 0.26 0.285 v d0 = 0, d1 = 1, d2 = 0, d3 = 1 0.195 0.22 0.235 v d0 = 0, d1 = 1, d2 = 0, d3 = 0 0.155 0.17 0.190 v d0 = 0, d1 = 0, d2 = 1, d3 = 1 0.115 0.13 0.145 v sense voltages ve d0 = 0, d1 = 0, d2 = 1, d3 = 0 0.075 0.09 0.100 v reference current i ref vref = 1.5v -0.5 a cr pin current i cr cr = 1.0v -1.6 -1.2 -0.8 ma md pin current i md md = 1.0v, cr = 4.0v -5.0 a logic system on voltage v lsd on 2.6 2.8 3.0 v logic system off voltage v lsd off 2.45 2.65 2.85 v lvsd hysteresis v lhis 0.03 0.15 0.35 v thermal shutdown temperature ts design guarantee * 170 c *design guarantee: design guarantee value, do not measurement.
lb11946 no.7946-3/14 ac electrical characteristics at v cc = 5v ratings parameter symbol conditions min typ max unit clock frequency fclk 200 550 khz data setup time tds 0.9 2.5 s data hold time tdh 0.9 2.5 s minimum clock high-level pulse width tsch 0.9 2.5 s minimum clock low-level pulse width tscl 0.9 2.5 s set pin stipulated time tlat 0.9 2.5 s set pin signal pulse width tlatw 1.9 5.0 s clk data set d4 d5 d6 d10 d11 tsch tscl fclk tsd tdh tlat tlatw
lb11946 no.7946-4/14 electrical characteristics at ta = 25 c, v cc = 3.3v, v bb = 42v, vref = 1.0v (when measuring the sense voltage: vref = 1.03v) ratings parameter symbol conditions min typ max unit output block i bb on 0.9 1.3 1.7 ma output stage supply current i bb off 0.52 0.7 1.05 ma v o (sat) 1 i o = +0.5a (sink) 1.2 1.5 v v o (sat) 2 i o = +1.0a (sink) 1.5 1.8 v v o (sat) 3 i o = -0.5a (source) 2.0 2.3 v output saturation voltage v o (sat) 4 i o = -1.0a (source) 2.3 2.6 v i o 1 (leak) v o = v bb (sink) 50 a output leakage current i o 2 (leak) v o = 0v (source) -50 a output sustain voltage v sus l = 15mh i o -1.5a, design guarantee * 45 v logic block i cc on d0 = 1, d1 = 1, d2 = 1, d3 = 1 when these data values are set 21 30 39 ma i cc off1 d0 = 0, d1 = 0, d2 = 0, d3 = 0 19 28 36.5 ma logic system supply current i cc off2 st = 0.8v 0.03 0.1 ma v ih 2 v input voltage v il 0.8 v i ih v ih = 2v 35 a input current i il v il = 0.8v 6 a d0 = 1, d1 = 1, d2 = 1, d3 = 1 vref = 1.03v 0.303 0.330 0.356 v d0 = 1, d1 = 1, d2 = 1, d3 = 0 vref = 1.03v 0.290 0.315 0.341 v d0 = 1, d1 = 1, d2 = 0, d3 = 1 vref = 1.03v 0.276 0.300 0.324 v d0 = 1, d1 = 1, d2 = 0, d3 = 0 vref = 1.03v 0.263 0.286 0.309 v d0 = 1, d1 = 0, d2 = 1, d3 = 1 vref = 1.03v 0.250 0.272 0.294 v d0 = 1, d1 = 0, d2 = 1, d3 = 0 vref = 1.03v 0.236 0.257 0.278 v d0 = 1, d1 = 0, d2 = 0, d3 = 1 vref = 1.03v 0.223 0.243 0.263 v d0 = 1, d1 = 0, d2 = 0, d3 = 0 vref = 1.03v 0.209 0.228 0.247 v d0 = 0, d1 = 1, d2 = 1, d3 = 1 vref = 1.03v 0.183 0.200 0.217 v d0 = 0, d1 = 1, d2 = 1, d3 = 0 vref = 1.03v 0.155 0.170 0.185 v d0 = 0, d1 = 1, d2 = 0, d3 = 1 vref = 1.03v 0.128 0.143 0.158 v d0 = 0, d1 = 1, d2 = 0, d3 = 0 vref = 1.03v 0.102 0.114 0.126 v d0 = 0, d1 = 0, d2 = 1, d3 = 1 vref = 1.03v 0.074 0.085 0.096 v sense voltages ve d0 = 0, d1 = 0, d2 = 1, d3 = 0 vref = 1.03v 0.047 0.057 0.067 v reference current i ref vref = 1.0v -0.5 a cr pin current i cr cr = 1.0v -0.91 -0.7 -0.49 ma md pin current i md md = 1.0v, cr = 4.0v -5.0 a lvsd voltage v lsd on 2.6 2.8 3.0 v logic system off voltage v lsd off 2.45 2.65 2.85 v lvsd hysteresis v lhis 0.03 0.15 0.35 v thermal shutdown temperature ts design guarantee * 170 c *design guarantee: design guaran tee value, do not measurement.
lb11946 no.7946-5/14 ac electrical characteristics at v cc = 3.3v ratings parameter symbol conditions min typ max unit clock frequency fclk 200 550 khz data setup time tds 0.9 2.5 s data hold time tdh 0.9 2.5 s minimum clock high-level pulse width tsch 0.9 2.5 s minimum clock low-level pulse width tscl 0.9 2.5 s set pin stipulated time tlat 0.9 2.5 s set pin signal pulse width tlatw 1.9 5.0 s clk data set d4 d5 d6 d10 d11 tsch tscl fclk tsd tdh tlat tlatw
lb11946 no.7946-6/14 package dimensions unit : mm (typ) 3147c -25 0 25 50 75 85 100 0 3.5 2.0 1.5 1.0 0.5 pd max -- ta 2.0 3.0 1.56 ambient temperature, ta -- c allowable power dissipation, pd max -- w independent ic pin assignment 1 v bb 2 nc 3 e1 4 d-gnda 5 nc 6 out a 7 out a 8 out b 9 10 11 12 13 14 out b nc d-gndb e2 nc v bb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc vref1 nc nc nc vref2 cr1 md clk data set st cr2 gnd lb11946 note: the d-gnda and d-gndb pins are the anode sides of the lower side diodes sanyo : dip28h(500mil) 1 14 28 15 0.4 0.6 4.0 4.0 26.75 20.0 r1.7 8.4 (1.81) 1.78 1.0 12.7 11.2
lb11946 no.7946-7/14 timing chart clock data set tsch tscl d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d0 serially transferred data definition ia4 ia3 ia2 ia1 de1 ph1 ib4 ib3 ib2 ib1 de2 ph2 output mode no. d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 out a out a out b out b i/o ratio dec mode 0 1 1 1 1 1 1 1 1 1 1 1 1 h l h l 100% slow 1 1 1 1 0 1 1 1 1 1 0 1 1 h l h l 96 slow 2 1 1 0 1 1 1 1 1 0 1 1 1 h l h l 91 slow 3 1 1 0 0 1 1 1 1 0 0 1 1 h l h l 87 slow 4 1 0 1 1 1 1 1 0 1 1 1 1 h l h l 83 slow 5 1 0 1 0 1 1 1 0 1 0 1 1 h l h l 78 slow 6 1 0 0 1 1 1 1 0 0 1 1 1 h l h l 74 slow 7 1 0 0 0 1 1 1 0 0 0 1 1 h l h l 70 slow 8 0 1 1 1 1 1 0 1 1 1 1 1 h l h l 61 slow 9 0 1 1 0 1 1 0 1 1 0 1 1 h l h l 52 slow 10 0 1 0 1 1 1 0 1 0 1 1 1 h l h l 44 slow 11 0 1 0 0 1 1 0 1 0 0 1 1 h l h l 35 slow 12 0 0 1 1 1 1 0 0 1 1 1 1 h l h l 26 slow 13 0 0 1 0 1 1 0 0 1 0 1 1 h l h l 17 slow 14 1 1 1 1 0 0 1 1 1 1 0 0 l h l h 100 fast 15 1 1 1 0 0 0 1 1 1 0 0 0 l h l h 96 fast 16 1 1 0 1 0 0 1 1 0 1 0 0 l h l h 91 fast 17 1 1 0 0 0 0 1 1 0 0 0 0 l h l h 87 fast 18 1 0 1 1 0 0 1 0 1 1 0 0 l h l h 83 fast 19 1 0 1 0 0 0 1 0 1 0 0 0 l h l h 78 fast 20 1 0 0 1 0 0 1 0 0 1 0 0 l h l h 74 fast 21 1 0 0 0 0 0 1 0 0 0 0 0 l h l h 70 fast 22 0 1 1 1 0 0 0 1 1 1 0 0 l h l h 61 fast 23 0 1 1 0 0 0 0 1 1 0 0 0 l h l h 52 fast 24 0 1 0 1 0 0 0 1 0 1 0 0 l h l h 44 fast 25 0 1 0 0 0 0 0 1 0 0 0 0 l h l h 35 fast 26 0 0 1 1 0 0 0 0 1 1 0 0 l h l h 26 fast 27 0 0 1 0 0 0 0 0 1 0 0 0 l h l h 17 fast 28 0 0 0 0 * * 0 0 0 0 * * off off off off 0 - note *: either 0 or 1. note *1: in mixed decay mode, set d4 and d10 to 0 and set the md pin to a level in the range 1.5 to 4.0v.
lb11946 no.7946-8/14 current settings truth table * items in parentheses are defined by the serial data. ia4 (d0) ia3 (d1) ia2 (d2) ia1 (d3) set current iout current ratio (%) 1 1 1 1 11.5/11.5 vref/3.04re = iout 100 1 1 1 0 11.0/11.5 vref/3.04re = iout 95.65 1 1 0 1 10.5/11.5 vref/3.04re = iout 91.30 1 1 0 0 10.0/11.5 vref/3.04re = iout 86.95 1 0 1 1 9.5/11.5 vref/3.04re = iout 82.61 1 0 1 0 9.0/11.5 vref/3.04re = iout 78.26 1 0 0 1 8.5/11.5 vref/3.04re = iout 73.91 1 0 0 0 8.0/11.5 vref/3.04re = iout 69.56 0 1 1 1 7.0/11.5 vref/3.04re = iout 60.87 0 1 1 0 6.0/11.5 vref/3.04re = iout 52.17 0 1 0 1 5.0/11.5 vref/3.04re = iout 43.48 0 1 0 0 4.0/11.5 vref/3.04re = iout 34.78 0 0 1 1 3.0/11.5 vref/3.04re = iout 26.08 0 0 1 0 2.0/11.5 vref/3.04re = iout 17.39 note: the current ratios shown are calculated values. block diagram out a out a v bb md v ref 1 gnd v cc cr1 e1 out b out b st d-gnd vref cr2 e2 data clk set d-gnd control logic circuit current selection circuit control logic circuit thermal shutdown circuit one-shot multivi- brator blanking time one-shot multivi- brator blanking time current selection circuit serial-parallel converter
lb11946 no.7946-9/14 sample application circuit at v cc = 5v 1 2 nc 3 e1 4 d-gnda 5 nc 6 out a 7 out a 8 out b 9 10 11 12 13 14 out b nc d-gndb e2 nc v bb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc vref1 nc nc nc vref2 cr1 md clk data set st cr2 gnd lb11946 v bb m 1 ? 1 ? 42v 47 f 1.5v 0.1 f 30k ? 680pf 680pf 30k ? 10 f 5v md voltage setting (1.6 to 3.9v) fast mode: gnd slow mode: v cc logic level input sample application circuit at v cc = 3.3v 1 2 nc 3 e1 4 d-gnda 5 nc 6 out a 7 out a 8 out b 9 10 11 12 13 14 out b nc d-gndb e2 nc v bb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc vref1 nc nc nc vref2 cr1 md clk data set st cr2 gnd lb11946 v bb m 1 ? 1 ? 42v 47 f 1..0v 0.1 f 30k ? 680pf 680pf 30k ? 10 f 3.3v md voltage setting (1.2 to 2.5v) fast mode: gnd slow mode: v cc logic level input
lb11946 no.7946-10/14 slow decay current path the reregenerative current at upper-side transistor switching operates vref 3.04 vref sbd sbd v bb out a out a on off on constant re i ve motor current i i = ve/re output off internal reference voltage by setting voltage circuit current path at output on regenerative current at upper-side transistor off sensing voltage comparator fig.1 fast decay current path vref 3.04 vref sbd sbd v bb out a out a on off re ve on off current path at output on current path at fast decay sensing voltage comparator fig.2
lb11946 no.7946-11/14 switching time chart at pwm operation tn fast decay slow decay (upper-side chopping) serial transmission data (d4, d10) = high md pin: low setting e pin output current cr pin out pin switching waveform switching waveform e pin output current cr pin out pin serial transmission data (d4, d10) = low md pin: low setting spike noise
lb11946 no.7946-12/14 mix decay tm tn t on t off switching waveform e pin output current cr pin out pin spike noise md pin voltage mix decay logic setting t on: output on time serial transmission data (d4, d10) = low t off: output off time md pin: 1.6v to 3.0v at v cc = 5v specification. tm: fast decay time at mix decay mode 1.2v to 2.5v at v cc = 3.3v specification. tn: noise cancel time the following operation by comparison between cr voltage and md pin voltage in turning off time. cr voltage > md pin voltage: both sides chopping cr voltage < md pin voltage: upper side chopping
lb11946 no.7946-13/14 attached documents 1. switching off time and noise canceller time calculations notes on the cr pin setting (switching off time and noise canceller time) the noise canceller time (tn) and the switching off time (toff) are set using the following formulas. (1) when v cc is 5 v noise canceller time (tn) tn c r ln {(1.5 ? ri) / (4.0 ? ri)}[s] cr pin charge current: 1.25ma switching off time (toff) toff ? c r ln (1.5/4.8)[s] component value ranges r: 5.6k ? to 100k ? c: 470pf to 2000pf (2) when v cc is 3.3 v noise canceller time (tn) tn c r ln {(1.06 ? ri) / (2.66 ? ri)}[s] cr pin charge current: 0.7 ma switching off time (toff) toff ? c r ln (1.06 / 3.1)[s] cr pin internal circuit structure r:30k ? c:680pf v cc line one-shot multivibrator blanking time circuit cr pin e1 2. notes on the md pin (1) if slow decay mode is set up by setting the d4 and d10 bits in the input serial data to 1, the md pin must be shorted to ground. (2) if fast decay mode is set up by se tting the d4 and d10 bits in the input seri al data to 0, mixed decay mode can be set with the md pin. when the v cc = 5v specifications are used the setting voltage range for mixed decay mode is 1.6 to 3.9v. when the v cc = 3.3v specifications are used the setting voltage range for mixe d decay mode is 1.2 to 2.5v. if mixed decay mode will not be used with the fast decay mode setting, either: (a) short the md pin to ground to select fast decay mode, or (b) short the md pin to v cc to select slow decay mode.
lb11946 ps no.7946-14/14 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. usage notes (1) notes on the vref pin since the vref pin inputs the reference voltage used to set the current, applications must be designed so that noise does not occur at this pin. (2) notes on the ground pins since this ic switches large currents, care is required with respect to the ground pins. the pcb pattern in sections where large currents flow must be designed with low impedances and must be kept separate from the small-signal system. in particular, the ground terminals of the e1 and e2 pin sense resistors (re) and the external schottky barrier diode ground terminals must be located as close as po ssible to the ic ground. the capacitors between v cc and ground and between v bb and ground must be as close as possible to the corresponding v cc and v bb pin in the pattern. (3) power on sequence when turning the power systems on v cc logic level inputs (clk, data, set, and st) vref v bb when turning the power systems off v bb vref logic level inputs (clk, data, set, and st) v cc note that if the power supply for the logic level inputs is on when the v cc power supply is off, a bias with an unstable state will be applied due to the protection diodes at the v cc pins, and this can cause incorrect operation. this catalog provides information as of february, 2 009. specifications and information herein are subject to change without notice.

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